1. Field of the Invention
The present invention relates to methods and apparatus for nonlinear processing of a delta-modulated pulse stream. The analog input signal is first converted into a one-bit, high density pulse stream using a delta-sigma modulator (Δ-ΣM) as an analog-to-digital converter (ADC). Δ-ΣM is highly oversampled and its pulse stream is nonlinearly processed in the rectifying encoder (RE), than filtered to get an analog rectified input signal. This circuit is known in literature as a full-wave rectifier or absolute circuit. Thus, the field of this invention is a nonlinear processing of one-bit pulse stream and it belongs to the area of non-linear digital signal processing (DSP).
2. Description of the Prior Art
There are few published references dealing with nonlinear processing of Δ-Σ modulated pulse stream. A majority of these references come from authors [1], [2], [3], [4], [5]. A simplified solution was proposed by Zrilic. In addition to squaring operations performed on a Δ-Σ pulse stream [U.S. Pat. No. 9,141,339 B2], this circuit performs rectification as well when a low pass filter (demodulator) is wide enough. However, existing solutions for Δ-Σ based rectification introduce undesired “spikes” at lower amplitude levels of the signal to be rectified. In particular, appearances of “spikes” are critical at zero crossings of an AC signal to be rectified. One possible solution to remove “spikes” was proposed in reference [5]. However, this solution requires a multi-level delta-sigma modulator, complex and power consuming logic for a sign detector circuit and so called “sorting network” needed to interface output of the multi-level Δ-Σ modulator [3], [4], [5].
To overcome the problem of “spikes” appearance, we propose a new type of absolute circuit which consists of a D flip-flop, XNOR logic gate, and a simple polarity (sign) logic detector.